Exemplary embodiments of the present invention relate to a package technology, and more particularly, to a semiconductor device and package using a slant backgrinding.
In order to implement a high-density small-sized semiconductor device, much development is being made on a stack package in which a plurality of semiconductor chips are stacked. Bonding pads for electrical connection are arranged on the surfaces of the stacked semiconductor chips, and wire bonding is used to electrically connect the bonding pads to a package substrate on which the semiconductor chips are stacked.
Since a plurality of semiconductor chips are stacked, the upper chip stacked on the lower chip may come into contact with the bonding wire connected to the lower chip, causing the bonding wire to be electrically shorted or damaged. To overcome such a problem, spacer layers or spacer tapes for ensuring a spacing between stacked chips may be arranged in order to guarantee a loop height margin of a bonding wire. In this case, the spacer layers and adhesive layers formed under and above the spacer layers may increase the total height of the package. Consequently, the number of stackable chips may decrease.
Meanwhile, a wire may penetrate through a wafer backside lamination (WBL) layer. However, since the bonding wire penetrates through the lamination layer, it may be difficult to control a loop of the bonding wire and the reliability of the lamination layer may become low. In addition, a stair type stack structure may be considered. Regarding the stair type stack structure, the chips may be stacked while being deviated in a lateral direction, so that the upper chip does not cover the bonding pad region of the lower chip. However, such a stack package may have disadvantages in that the area of the package increases and the length of the bonding wire gradually increases toward the upper chips.